Power protection circuit

ABSTRACT

A power protection circuit includes a power providing unit, a first and second voltage converters, a first and second switches, a first and second voltage detecting circuits, and a first and second warning circuits. The first switch connects between the power providing unit and the first voltage converter. The second switch connects between the power providing unit and the second voltage converter. The first and second voltage detecting circuits are respectively connected to the first and second voltage converters. The first and second warning circuits are respectively connected to the first and second voltage detecting circuits. When the input voltage of the first voltage detecting circuit drops, the first switch turns off the first voltage converter, the first warning circuit signals a warning; when the input voltage of the second voltage detecting circuit drops, the second switch turns off the second voltage converter, the second warning circuit signals a warning.

BACKGROUND

1. Technical Field

The present disclosure relates to a power protection circuit.

2. Description of Related Art

Sometimes, when a component that is mounted on a circuit boardmalfunctions, current travelling in the circuit board may greatlyincrease or the circuit board may short-circuit. It may also result inelectric shock or other accidents. In addition, it requires manualinspection and diagnostics for repairs of the component that ismalfunctioning, which is time-consuming and inefficient.

Therefore, it is desirable to provide a power protection circuit whichcan overcome the above problems.

BRIEF DESCRIPTION OF THE DRAWINGS

Many aspects of the present disclosure can be better understood withreference to the drawings. The components in the drawings are notnecessarily drawn to scale, the emphasis instead being placed uponclearly illustrating the principles of the present disclosure. Moreover,in the drawings, like reference numerals designate corresponding partsthroughout the several views, and all the views are schematic.

FIG. 1 is a functional block diagram of a power protection circuit inaccordance to an exemplary embodiment.

FIG. 2 is a circuit diagram of the power protection circuit of FIG. 1.

DETAILED DESCRIPTION

Embodiments of the present disclosure will now be described in detailbelow and with reference to the drawings.

Referring to FIG. 1, a power protection circuit 100, according to anexemplary embodiment, it is applied to a circuit board (not shown)(e.g., embodied as a portion of the circuit board) to protect thecircuit board when one or more components of the circuit boardmalfunctions. The power protection circuit 100 includes a powerproviding unit 10, a first voltage converter 21, a second voltageconverter 22, a first switch 31, a second switch 32, a first voltagedetecting circuit 41, a second voltage detecting circuit 42, a firstwarning circuit 51, and a second warning circuit 52.

The power providing unit 10 is configured for providing power to thefirst voltage converter 21 and the second voltage converter 22. Thefirst switch 31 is interconnected between the power providing unit 10and the first voltage converter 21. The second switch 32 isinterconnected between the power providing unit 10 and the secondvoltage converter 22. The first voltage detecting circuit 41 iselectrically connected to the first voltage converter 21 and the firstswitch 31 and configured to detect whether or not the first voltageconverter 21 is malfunctioning. The second voltage detecting circuit 42is connected to the second voltage converter 22 and the second switch 32and configured to detect whether or not the second voltage converter 22is malfunctioning. The first warning circuit 51 is electricallyconnected to the first voltage detecting circuit 41 and the secondwarning circuit 52 is electrically connected to the second voltagedetecting circuit 42. When the first voltage detecting circuit 41detects that the first voltage converter 21 is malfunctioning, the firstswitch 31 turns off power supply for the first voltage converter 21 andactuates the first warning circuit 51 to warn user. When the secondvoltage detecting circuit 42 detects that the second voltage converter22 is malfunctioning, the second switch 32 turns off power supply forthe second voltage converter 22 and actuates the second warning circuit52 to warn user.

It should be noted that the number of the groups of the voltageconverter, switches, voltage detecting circuit, and the warning circuitare not limited to two, but can be any number depending on requirements.

Also referring to FIG. 2, in the present embodiment, the power providingunit 10 is configured for a 12V power output. The first voltageconverter 21 is configured for converting the 12V power output into a 5Vpower output. The second voltage converter 22 is configured forconverting the 12V power output into a 3.3V power output. An output 212of the first voltage converter 21 is electrically connected to onecomponent (not shown), such as, a load, and an output 222 of the secondvoltage converter 22 is electrically connected to another component (notshown), such as, another load.

The first switch 31 includes a first transistor Q1. The second switch 32includes a second transistor Q2. In the present embodiment, both thefirst switch 31 and the second switch 32 are PMOS transistors. The drainD of the first transistor Q1 is connected to an input 211 of the firstvoltage converter 21. The gate G of the first transistor Q1 is groundedby a first delay capacitance C1. The source S of the first transistor Q1is connected to the power providing unit 10, and is also connected tothe first voltage detecting circuit 41. The drain D of the secondtransistor Q2 is connected to an input 221 of the second voltageconverter 22. The gate G of the second transistor Q2 is grounded by asecond delay capacitance C2, and is also connected to the second voltagedetecting circuit 42. The source S of the second transistor Q2 isconnected to the power providing unit 10.

The first voltage detecting circuit 41 includes a third transistor Q3and a fourth transistor Q4. In the present embodiment, both the thirdtransistor Q3 and the fourth transistor Q4 are NPN transistors. Thecollector C of the third transistor Q3 is connected to the gate G of thefirst transistor Q1 by a resistor R2; the emitter E is grounded by aresistor R1; the base B is connected to an output 212 of the firstvoltage converter 21 by a resistor R3. The collector C of the fourthtransistor Q4 is connected to the power providing unit 10 by a resistorR4; the emitter E is grounded by a resistor R5; the base B is groundedby two resistors R6 and R9. A resistor R8 is interconnected between thecollector C of the third transistor Q3 and the collector C of the fourthtransistor Q4. A resistor R7 is interconnected between the resistor R6and the power providing unit 10.

The second voltage detecting circuit 42 includes a fifth transistor Q5and a sixth transistor Q6. In the present embodiment, both the fifthtransistor Q5 and the sixth transistor Q6 are NPN transistors. Thecollector C of the fifth transistor Q5 is connected to the gate G of thesecond transistor Q2 by a resistor R10; the emitter E is grounded by aresistor R11; the base B is connected to an output 222 of the secondvoltage converter 22 by a resistor R12. The collector C of the sixthtransistor Q6 is connected to the power providing unit 10 by a resistorR13; the emitter E is grounded by a resistor R14; the base B is groundedby two resistors R15 and R18. A resistor R17 is interconnected betweenthe collector C of the fifth transistor Q5 and the collector C of thesixth transistor Q6. A resistor R16 is interconnected between theresistor R15 and the power providing unit 10.

The first warning circuit 51 includes a seventh transistor Q7, a eighthtransistor Q8, a ninth transistor Q9, and a first light-emitting diodeD1. In the present embodiment, the seventh transistor Q7 is an NPNtransistor. Both the eighth transistor Q8 and the ninth transistor Q9are NMOS transistors. The base B of the seventh transistor Q7 isconnected to the collector C of the third transistor Q3; the collector Cof the seventh transistor Q7 is connected to the power providing unit 10by a resistor R19; the emitter E of the seventh transistor Q7 isconnected to the collector C of the fourth transistor Q4 by a resistorR20. Both gates G of the eighth transistor Q8 and the ninth transistorQ9 are connected to the collector C of the fourth transistor Q4. Thesource S of the eighth transistor Q8 is connected to the drain D of theninth transistor Q9. The drain D of the eighth transistor Q8 isconnected to the cathode of the first light-emitting diode D1. Thesource S of the ninth transistor Q9 is grounded. The anode of the firstlight-emitting diode D1 is connected to the power providing unit 10 by aresistor R21.

The second warning circuit 52 includes a tenth transistor Q10, aneleventh transistor Q11, a twelfth transistor Q12, and a secondlight-emitting diode D2. In the present embodiment, the tenth transistorQ10 is an NPN transistor. Both the eleventh transistor Q11 and thetwelfth transistor Q12 are NMOS transistors. The base B of the tenthtransistor Q10 is connected to the collector C of the fifth transistorQ5; the collector C of the tenth transistor Q10 is connected to thepower providing unit 10 by a resistor R22; the emitter E of the tenthtransistor Q10 is connected to the collector C of the sixth transistorQ6 by a resistor R23. Both gates G of the eleventh transistor Q11 andthe twelfth transistor Q12 are respectively connected to a node formedbetween the source S of the eighth transistor Q8 and the drain D of theninth transistor Q9. The source S of the eleventh transistor Q11 isconnected to the drain D of the twelfth transistor Q12. The drain D ofthe eleventh transistor Q11 is connected to the cathode of the secondlight-emitting diode D2. The source S of the twelfth transistor Q12 isgrounded. Both gates G of the eighth transistor Q8 and the ninthtransistor Q9 are connected to a node formed between the source S of theeleventh transistor Q11 and the drain D of the twelfth transistor Q12.The anode of the second light-emitting diode D2 is connected to thepower providing unit 10 by a resistor R24.

In use, when the component connected to the output 212 of the firstvoltage converter 21 malfunctions, the first voltage detecting circuit41 detects a reduction in the input voltage of the base B of the thirdtransistor Q3. The third transistor Q3 turns off, and the voltage of thegate G of the first transistor Q1 becomes higher, the first transistorQ1 also turns off. As such, the first voltage converter 21 stops work.At the same time, the seventh transistor Q7, the eighth transistor Q8,and the ninth transistor Q9 are all turned on, and the firstlight-emitting diode D1 emits light to emit a warning signal. Both gatesG of the eleventh transistor Q11 and the twelfth transistor Q12 gain alow level voltage, the eleventh transistor Q11 and the twelfthtransistor Q12 turn off, the second light-emitting diode D2 does notemit light.

When the component connected to the output 222 of the second voltageconverter 22 malfunctions, the second voltage detecting circuit 42detects a reduction in the input voltage of the base B of the fifthtransistor Q5. The fifth transistor Q5 turns off, and the voltage of thegate G of the second transistor Q2 becomes higher, the second transistorQ2 also turns off. As such, the second voltage converter 22 stops work.At the same time, the sixth transistor Q6, the tenth transistor Q10, andthe eleventh transistor Q11 are all turned on, and the secondlight-emitting diode D2 emits light to signal a warning. Both gates G ofthe eighth transistor Q8 and the ninth transistor Q9 gain a low levelvoltage, the eighth transistor Q8 and the ninth transistor Q9 turn off,the first light-emitting diode D1 does not emit light.

It will be understood that the above particular embodiments is shown anddescribed by way of illustration only. The principles and the featuresof the present invention may be employed in various and numerousembodiments thereof without departing from the scope of the invention asclaimed. The above-described embodiments illustrate the scope of theinvention but do not restrict the scope of the invention.

What is claimed is:
 1. A power protection circuit, comprising: a powerproviding unit configured for providing power supply; a first voltageconverter; a first switch interconnected between the power providingunit and the first voltage converter; a second voltage converter; asecond switch interconnected between the power providing unit and thesecond voltage converter; a first voltage detecting circuit connected tothe first voltage converter and the first switch; a second voltagedetecting circuit connected to the second voltage converter and thesecond switch; a first warning circuit connected to the first voltagedetecting circuit; and a second warning circuit connected to the secondvoltage detecting circuit; wherein when the input voltage of the firstvoltage detecting circuit drops, the first switch turns off the firstvoltage converter, and the first warning circuit signals a warning; whenthe input voltage of the second voltage detecting circuit drops, thesecond switch turns off the second voltage converter, and the secondwarning circuit signals a warning.
 2. The power protection circuit ofclaim 1, wherein the first switch comprises a first transistor, thesecond switch comprises a second transistor, when the input voltage ofthe first voltage detecting circuit drops, the first switch turns offthe first voltage converter, when the input voltage of the secondvoltage detecting circuit drops, the second switch turns off the secondvoltage converter.
 3. The power protection circuit of claim 2, whereinboth the first switch and the second switch are PMOS transistors, thedrain of the first transistor is connected to an input of the firstvoltage converter, the gate of the first transistor is grounded, thesource of the first transistor is connected to the power providing unit,the drain of the second transistor is connected to an input of thesecond voltage converter, the gate of the second transistor is grounded,the source of the second transistor is connected to the power providingunit.
 4. The power protection circuit of claim 3, wherein the firstvoltage detecting circuit comprises a third transistor and a fourthtransistor, both the third transistor and the fourth transistor are NPNtransistors, the collector of the third transistor is connected to thegate of the first transistor, the emitter of the third transistor isgrounded, the base of the third transistor is connected to an output ofthe first voltage converter, the collector of the fourth transistor isconnected to the power providing unit, the emitter of the fourthtransistor is grounded, the base of the fourth transistor is grounded,the collector of the third transistor is connected to the collector ofthe fourth transistor.
 5. The power protection circuit of claim 3,wherein the second voltage detecting circuit comprises a fifthtransistor and a sixth transistor, both the fifth transistor and thesixth transistor are NPN transistors, the collector C of the fifthtransistor is connected to the gate of the second transistor, theemitter of the fifth transistor is grounded, the base of the fifthtransistor is connected to an output of the second voltage converter,the collector of the sixth transistor is connected to the powerproviding unit, the emitter of the sixth transistor is grounded, thebase of the sixth transistor is grounded, the collector of the fifthtransistor is connected to the collector of the sixth transistor.
 6. Thepower protection circuit of claim 4, wherein the first warning circuitcomprises a seventh transistor, a eighth transistor, a ninth transistor,and a first light-emitting diode, the seventh transistor is an NPNtransistor, both the eighth transistor and the ninth transistor are NMOStransistors, the base of the seventh transistor is connected to thecollector of the third transistor, the collector of the seventhtransistor is connected to the power providing unit, the emitter of theseventh transistor is connected to the collector of the fourthtransistor, both gates of the eighth transistor and the ninth transistorare connected to the collector of the fourth transistor, the source ofthe eighth transistor is connected to the drain of the ninth transistor,the drain of the eighth transistor is connected to the cathode of thefirst light-emitting diode, the source of the ninth transistor isgrounded, the anode of the first light-emitting diode is connected tothe power providing unit.
 7. The power protection circuit of claim 5,wherein the second warning circuit comprises a tenth transistor, aneleventh transistor, a twelfth transistor, and a second light-emittingdiode, the tenth transistor is an NPN transistor, both the eleventhtransistor and the twelfth transistor are NMOS transistors, the base ofthe tenth transistor is connected to the collector of the fifthtransistor, the collector of the tenth transistor is connected to thepower providing unit, the emitter of the tenth transistor is connectedto the collector of the sixth transistor, both gates of the eleventhtransistor and the twelfth transistor are respectively connected to annode formed between the source of the eighth transistor and drain of theninth transistor, the source of the eleventh transistor is connected tothe drain of the twelfth transistor, the drain of the twelfth transistoris connected to the cathode of the second light-emitting diode, thesource of the twelfth transistor is grounded, the anode of the secondlight-emitting diode is connected to the power providing unit.
 8. Thepower protection circuit of claim 3, wherein the gate of the firsttransistor is grounded by a first delay capacitance.
 9. The powerprotection circuit of claim 3, wherein the gate of the second transistoris grounded by a second delay capacitance.
 10. A power protectioncircuit, comprising: a power providing unit configured for providingpower supply; a voltage converter; a switch interconnected between thepower providing unit and the voltage converter; a voltage detectingcircuit connected to the voltage converter and the switch; and a warningcircuit connected to the voltage detecting circuit; wherein when theinput voltage of the voltage detecting circuit drops, the switch turnsoff the voltage converter, and the warning circuit signals a warning.11. The power protection circuit of claim 10, wherein the switchcomprises a transistor, when the input voltage of the voltage detectingcircuit drops, the switch turns off the voltage converter.
 12. The powerprotection circuit of claim 11, wherein the switch is PMOS transistor,the drain of the transistor is connected to an input of the voltageconverter, the gate of the transistor is grounded, the source of thetransistor is connected to the power providing unit.
 13. The powerprotection circuit of claim 12, wherein the voltage detecting circuitcomprises a first transistor and a second transistor, both the firsttransistor and the second transistor are NPN transistors, the collectorof the first transistor is connected to the gate of the PMOS transistor,the emitter of the first transistor is grounded, the base of the firsttransistor is connected to an output of the voltage converter, thecollector of the second transistor is connected to the power providingunit, the emitter of the second transistor is grounded, the base of thesecond transistor is grounded, the collector of the first transistor isconnected to the collector of the second transistor.
 14. The powerprotection circuit of claim 13, wherein the warning circuit comprises athird transistor, a fourth transistor, a fifth transistor, and alight-emitting diode, the third transistor is an NPN transistor, boththe fourth transistor and the fifth transistor are NMOS transistors, thebase of the third transistor is connected to the collector of the firsttransistor, the collector of the third transistor is connected to thepower providing unit, the emitter of the third transistor is connectedto the collector of the second transistor, both gates of the fourthtransistor and the fifth transistor are connected to the collector ofthe second transistor, the source of the fourth transistor is connectedto the drain of the fifth transistor, the drain of the fourth transistoris connected to the cathode of the light-emitting diode, the source ofthe fifth transistor is grounded, the anode of the light-emitting diodeis connected to the power providing unit.
 15. The power protectioncircuit of claim 12, wherein the gate of the PMOS transistor is groundedby a delay capacitance.